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Professional quality, beyond value.
3 Years
| Ask Lasest Price | |
| Brand Name : | Altera |
| Model Number : | EPM3256ATI144-10N |
| Price : | Please contact us |
| Payment Terms : | T/T, Western Union, PayPay, MoneyGram |
| Supply Ability : | 3600pcs Per Mouth |
| Delivery Time : | 2-3work days |
Programmable Fpga EPM3256ATI144-10N CPLD MAX 3000A 256 Macro 116 IOs
Specifications
| Product Attribute | Attribute Value |
|---|---|
| Intel | |
| Product Category: | FPGA - Field Programmable Gate Array |
| Cyclone III EP3C5 | |
| 5136 LE | |
| 94 I/O | |
| 1.15 V | |
| 1.25 V | |
| 0 C | |
| + 85 C | |
| SMD/SMT | |
| EQFP-144 | |
| Tray | |
| Brand: | Intel / Altera |
| Maximum Operating Frequency: | 315 MHz |
| Moisture Sensitive: | Yes |
| Number of Logic Array Blocks - LABs: | 321 LAB |
| Operating Supply Voltage: | 1.15 V to 1.25 V |
| Product Type: | FPGA - Field Programmable Gate Array |
Description
MAX 3000A devices are low–cost, high–performance devices based on the Altera MAX architecture.
Fabricated with advanced CMOS technology, the EEPROM–based MAX 3000A devices operate with
a 3.3-V supply voltage and provide 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns,
and counter speeds of up to 227.3 MHz. MAX 3000A devices in the –4, –5, –6, –7, and –10 speed
grades are compatible with the timing requirements of the PCI Special Interest Group (PCI SIG)
Features
High–performance, low–cost CMOS EEPROM–based programmable logic devices (PLDs) built on
a MAX® architecture (see Table 1)
3.3-V in-system programmability (ISP) through the built–in IEEE Std. 1149.1 Joint Test Action Group
(JTAG) interface with advanced pin-locking capability – ISP circuitry compliant with IEEE Std. 1532
Built–in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990
Enhanced ISP features: – Enhanced ISP algorithm for faster programming – ISP_Done bit to ensure
complete programming – Pull-up resistor on I/O pins during in–system programming
High–density PLDs ranging from 600 to 10,000 usable gates
4.5–ns pin–to–pin logic delays with counter frequencies of up to 227.3 MHz
MultiVoltTM I/O interface enabling the device core to run at 3.3 V, while I/O pins are compatible with
5.0–V, 3.3–V, and 2.5–V logic levels
Pin counts ranging from 44 to 256 in a variety of thin quad flat pack (TQFP), plastic quad flat pack
(PQFP), plastic J–lead chip carrier (PLCC), and FineLine BGATM packages
Hot–socketing support
Programmable interconnect array (PIA) continuous routing structure for fast, predictable performance
MAX 3000A Device Features
Trading Guide
| Shipping | Delivery period | For in-stock parts, orders are estimated to ship out in 3 days.Once
shipped, estimated delivery time depends on the below carriers you
chose: |
| Shipping rates | After confirming the order, we will evaluate the shipping cost based on the weight of the goods | |
| Shipping option | We provide DHL, FedEx, EMS, SF Express, and Registered Air Mail international shipping. | |
| Shipping tracking | We will notify you by email with tracking number once order is shipped. | |
Returning warranty | Returning | Returns are normally accepted when completed within 30 days from date of shipment.Parts should be unused and in original packaging.Customer has to take charge for the shipping. |
| Warranty | All Retechip purchases come with a 30-day money-back return policy, This warranty shall not apply to any item where defects have been caused by improper customer assembly,failure by customer to follow instructions, product modification, negligent or improper operation | |
| Ordering | Payment | T/T,PayPal, Credit Card includes Visa, Master, American Express. |
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